{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11480992","patent":{"patent_number":"US-11480992","title":"Techniques for phase shift reduction in a single crystal multiple output clock system","assignee":null,"inventors":[],"filing_date":"2021-01-21T00:00:00.000Z","publication_date":"2022-10-25T00:00:00.000Z","cpc_codes":["G06F","H04B"],"num_claims":30,"abstract":"Certain aspects of the present disclosure provide a circuit for clock signal generation. The circuit generally includes a plurality of clock generation circuits configured to generate a plurality of clock signals from a clock signal, and a power supply circuit having an output coupled to power supply inputs of the plurality of clock generation circuits. The circuit may also include a capacitor array coupled to the output of the power supply circuit and include a plurality of capacitive elements, the capacitor array being configured to selectively couple each of the plurality of capacitive elements to the output of the power supply circuit based on a quantity of one or more active clock generation circuits of the plurality of clock generation circuits."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Techniques for phase shift reduction in a single crystal multiple output clock system","description":"Certain aspects of the present disclosure provide a circuit for clock signal generation. The circuit generally includes a plurality of clock generation circuits configured to generate a plurality of c","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11480992","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11480992","citation_suggestion":"Patentable. \"Techniques for phase shift reduction in a single crystal multiple output clock system\" (US-11480992). https://patentable.app/patents/US-11480992","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11480992","json":"https://patentable.app/api/llm-context/US-11480992","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T00:15:17.867Z"}