{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11482262","patent":{"patent_number":"US-11482262","title":"Per pin Vref for data receivers in non-volatile memory system","assignee":null,"inventors":[],"filing_date":"2021-06-16T00:00:00.000Z","publication_date":"2022-10-25T00:00:00.000Z","cpc_codes":["G11C","G06F","G06F","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"Technology is disclosed herein for per pin internal reference voltage generation for data receivers in non-volatile memory systems. A receiving circuit may have an on-die voltage generator that has inputs to receive a separate voltage magnitude select signal for each data receiver on the receiving circuit. The on-die voltage generator provides a separate reference voltage for each data receiver. This allows the reference voltage for each data receiver to be calibrated separately. A separate reference voltage for each data receiver compensates for variations between data paths, and provides for a wider data valid window than if the same reference voltage were used for all data receivers. Generating the different reference voltages on-die can potentially require a large area, as well as consume considerable power and/or current. A voltage divider and multiplexers may provide the different reference voltages, which saves space and is power and current efficient."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Per pin Vref for data receivers in non-volatile memory system","description":"Technology is disclosed herein for per pin internal reference voltage generation for data receivers in non-volatile memory systems. A receiving circuit may have an on-die voltage generator that has in","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11482262","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11482262","citation_suggestion":"Patentable. \"Per pin Vref for data receivers in non-volatile memory system\" (US-11482262). https://patentable.app/patents/US-11482262","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11482262","json":"https://patentable.app/api/llm-context/US-11482262","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T21:25:17.408Z"}