{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11482265","patent":{"patent_number":"US-11482265","title":"Write leveling","assignee":null,"inventors":[],"filing_date":"2021-09-27T00:00:00.000Z","publication_date":"2022-10-25T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"A memory device includes a command interface configured to receive a write command and internal write adjust (IWA) circuitry. The IWA circuitry is configured to receive the write command from the command interface, generate an internal write signal (IWS) based upon the received write command and train a data strobe (DQS) signal to generate a DQS signal having a set amount of phase alignment with a clock (CLK) of the memory device to capture a data signal (DQ) using the IWS."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Write leveling","description":"A memory device includes a command interface configured to receive a write command and internal write adjust (IWA) circuitry. The IWA circuitry is configured to receive the write command from the comm","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11482265","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11482265","citation_suggestion":"Patentable. \"Write leveling\" (US-11482265). https://patentable.app/patents/US-11482265","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11482265","json":"https://patentable.app/api/llm-context/US-11482265","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T17:20:14.410Z"}