{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11482506","patent":{"patent_number":"US-11482506","title":"Edge-trimming methods for wafer bonding and dicing","assignee":null,"inventors":[],"filing_date":"2020-03-31T00:00:00.000Z","publication_date":"2022-10-25T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"A front-side peripheral region of a first wafer may be edge-trimmed by performing a first pre-bonding edge-trimming process. A second wafer to be bonded with the first wafer is provided. Optionally, a front-side peripheral region of the second wafer may be edge-trimmed by performing a second pre-bonding edge-trimming process. A front surface of the first wafer is bonded to a front surface of a second wafer to form a bonded assembly. A backside of the first wafer is thinned by performing at least one wafer thinning process. The first wafer and a front-side peripheral region of the second wafer may be edge-trimmed by performing a post-bonding edge-trimming process. The bonded assembly may be subsequently diced into bonded semiconductor chips."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Edge-trimming methods for wafer bonding and dicing","description":"A front-side peripheral region of a first wafer may be edge-trimmed by performing a first pre-bonding edge-trimming process. A second wafer to be bonded with the first wafer is provided. Optionally, a","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11482506","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11482506","citation_suggestion":"Patentable. \"Edge-trimming methods for wafer bonding and dicing\" (US-11482506). https://patentable.app/patents/US-11482506","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11482506","json":"https://patentable.app/api/llm-context/US-11482506","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T12:26:06.269Z"}