{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11487653","patent":{"patent_number":"US-11487653","title":"L2P translation techniques in limited RAM systems to increase random write performance using multiple L2P caches","assignee":null,"inventors":[],"filing_date":"2019-09-27T00:00:00.000Z","publication_date":"2022-11-01T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":19,"abstract":"Devices and techniques are disclosed herein for more efficiently performing random write operation for a memory device. In an example, a method of operating a flash memory device can include receiving a write request at a flash memory device from a host, the write request including a first logical block address and write data, saving the write data to a location of the flash memory device having a first physical address, operating the flash memory device in a first mode when an amount of write data associated with the write request is above a threshold, operating the flash memory device in a second mode when an amount of write data is below the threshold, and comparing the amount of write data to the threshold."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"L2P translation techniques in limited RAM systems to increase random write performance using multiple L2P caches","description":"Devices and techniques are disclosed herein for more efficiently performing random write operation for a memory device. In an example, a method of operating a flash memory device can include receiving","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11487653","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11487653","citation_suggestion":"Patentable. \"L2P translation techniques in limited RAM systems to increase random write performance using multiple L2P caches\" (US-11487653). https://patentable.app/patents/US-11487653","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11487653","json":"https://patentable.app/api/llm-context/US-11487653","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T11:55:08.294Z"}