{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11488852","patent":{"patent_number":"US-11488852","title":"Methods and apparatus for reducing high voltage arcing in semiconductor process chambers","assignee":null,"inventors":[],"filing_date":"2020-05-13T00:00:00.000Z","publication_date":"2022-11-01T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"Methods and apparatus for preventing or reducing arcing of an electrostatic chuck in a process chamber. In some embodiments, a method of preventing or reducing arcing of an electrostatic chuck includes forming a first recess in at least a portion of a sidewall of the electrostatic chuck and filling the first recess with a conformable dielectric material that remains conformable (elastic) over a temperature range of at least approximately zero degrees Celsius to approximately 80 degrees Celsius. In some embodiments, the first recess is filled with the conformable dielectric material such that the conformable dielectric material does not bond to at least one surface of the first recess. The conformable dielectric material may also be used to fill a second recess in a dielectric sleeve adjacent to the electrostatic chuck."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Methods and apparatus for reducing high voltage arcing in semiconductor process chambers","description":"Methods and apparatus for preventing or reducing arcing of an electrostatic chuck in a process chamber. In some embodiments, a method of preventing or reducing arcing of an electrostatic chuck include","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11488852","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11488852","citation_suggestion":"Patentable. \"Methods and apparatus for reducing high voltage arcing in semiconductor process chambers\" (US-11488852). https://patentable.app/patents/US-11488852","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11488852","json":"https://patentable.app/api/llm-context/US-11488852","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T07:58:50.781Z"}