{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11488954","patent":{"patent_number":"US-11488954","title":"Method of cointegrating semiconductor structures for different voltage transistors","assignee":null,"inventors":[],"filing_date":"2020-12-18T00:00:00.000Z","publication_date":"2022-11-01T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":14,"abstract":"The disclosed technology relates generally to semiconductor devices and manufacturing methods thereof, and more particularly to field-effect transistors operating at different voltages and methods for integrating the same. In one aspect, a method of fabricating a semiconductor device comprises: a) providing a substrate and a first hardmask; b) next, providing a second hardmask over a first region of the first hardmask; c) next, forming a first set of hardmask fins in a second region of the first hardmask; d) next, masking the second region; e) next, providing a set of photoresist fins on the second hardmask; f) next, patterning the second hardmask and the first region by using the photoresist fins as a mask; g) next, forming a first set of semiconductor fins of a first height by etching the substrate; h) next, removing the mask provided in step d; i) next, forming a second set of semiconductor fins of a second height in the second region and extending the height of the first set of semiconductor fins to a third height in the first region, by etching the substrate by using the first and second sets of hardmask fins as masks."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method of cointegrating semiconductor structures for different voltage transistors","description":"The disclosed technology relates generally to semiconductor devices and manufacturing methods thereof, and more particularly to field-effect transistors operating at different voltages and methods for","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11488954","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11488954","citation_suggestion":"Patentable. \"Method of cointegrating semiconductor structures for different voltage transistors\" (US-11488954). https://patentable.app/patents/US-11488954","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11488954","json":"https://patentable.app/api/llm-context/US-11488954","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T03:36:39.686Z"}