{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11488969","patent":{"patent_number":"US-11488969","title":"Two-port SRAM cells with asymmetric M1 metalization","assignee":null,"inventors":[],"filing_date":"2021-05-28T00:00:00.000Z","publication_date":"2022-11-01T00:00:00.000Z","cpc_codes":["G11C","G11C","B82Y"],"num_claims":20,"abstract":"A semiconductor structure includes an array of two-port (TP) SRAM cells, each of which includes a write port and a read port. The write port includes two write pass gate (W_PG) transistors, two write pull-down (W_PD) transistors, and two write pull-up (W_PU) transistors. The array of TP SRAM cells includes first and second TP SRAM cells whose write ports abuts each other. Two W_PG transistors of the first and second TP SRAM cells share a common gate electrode. Source/drain electrodes of two W_PD transistors of the first and second TP SRAM cells share a common contact. The first TP SRAM cell includes a Vss conductor connected to the common contact. The second TP SRAM cell includes a write word line (W_WL) landing pad connected to the common gate electrode. The Vss conductor and the W_WL landing pad are located at a first metal layer."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Two-port SRAM cells with asymmetric M1 metalization","description":"A semiconductor structure includes an array of two-port (TP) SRAM cells, each of which includes a write port and a read port. The write port includes two write pass gate (W_PG) transistors, two write ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11488969","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11488969","citation_suggestion":"Patentable. \"Two-port SRAM cells with asymmetric M1 metalization\" (US-11488969). https://patentable.app/patents/US-11488969","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11488969","json":"https://patentable.app/api/llm-context/US-11488969","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T14:09:21.964Z"}