{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11489056","patent":{"patent_number":"US-11489056","title":"Semiconductor device with multi-threshold gate structure","assignee":null,"inventors":[],"filing_date":"2020-02-10T00:00:00.000Z","publication_date":"2022-11-01T00:00:00.000Z","cpc_codes":["H01L","H01L","B82Y"],"num_claims":20,"abstract":"The present disclosure describes a semiconductor device that includes a substrate and a first transistor on the substrate. The first transistor includes a first gate structure and the first gate structure includes a gate dielectric layer and a first work function layer on the gate dielectric layer. The first gate structure also includes a capping layer on the first work function layer. The semiconductor device also includes a second transistor on the substrate, in which the second transistor includes a second gate structure. The second gate structure includes the gate dielectric layer and a second work function layer on the gate dielectric layer. The second gate structure also includes the first work function layer on the second work function layer and the silicon capping layer on the first work function layer."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor device with multi-threshold gate structure","description":"The present disclosure describes a semiconductor device that includes a substrate and a first transistor on the substrate. The first transistor includes a first gate structure and the first gate struc","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11489056","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11489056","citation_suggestion":"Patentable. \"Semiconductor device with multi-threshold gate structure\" (US-11489056). https://patentable.app/patents/US-11489056","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11489056","json":"https://patentable.app/api/llm-context/US-11489056","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T14:30:30.655Z"}