{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11494308","patent":{"patent_number":"US-11494308","title":"Methods and devices for bypassing the internal cache of an advanced DRAM memory controller","assignee":null,"inventors":[],"filing_date":"2017-09-06T00:00:00.000Z","publication_date":"2022-11-08T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F"],"num_claims":17,"abstract":"A calculation system comprises a computing device having one or more instruction-controlled processing cores and a memory controller, the memory controller including a cache memory; and a memory circuit coupled to the memory controller via a data bus and an address bus, the memory circuit being adapted to have a first m-bit memory location accessible by a plurality of first addresses provided on the address bus, the calculation device being configured to select, in order to each memory operation accessing the first m-bit memory location, one address among the plurality first addresses."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Methods and devices for bypassing the internal cache of an advanced DRAM memory controller","description":"A calculation system comprises a computing device having one or more instruction-controlled processing cores and a memory controller, the memory controller including a cache memory; and a memory circu","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11494308","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11494308","citation_suggestion":"Patentable. \"Methods and devices for bypassing the internal cache of an advanced DRAM memory controller\" (US-11494308). https://patentable.app/patents/US-11494308","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11494308","json":"https://patentable.app/api/llm-context/US-11494308","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T12:20:20.016Z"}