{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11495306","patent":{"patent_number":"US-11495306","title":"Peak current management in a memory array","assignee":null,"inventors":[],"filing_date":"2021-02-15T00:00:00.000Z","publication_date":"2022-11-08T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","H02M","G11C","G11C"],"num_claims":20,"abstract":"An electronic device comprises a multi-chip package including multiple memory dice that include a memory array, charging circuitry, polling circuitry and a control unit. The charging circuitry is configured to perform one or more memory events in a high current mode using a high current level or in a low current mode using a lower current level. The polling circuitry is configured to poll a power status node common to the multiple memory dice to determine availability of the high current mode. The control unit is configured to operate the charging circuitry in the high current mode to perform the one or more memory events when the polling circuitry indicates that the high current mode is available, and operate the charging circuitry in the low current mode to perform the one or more memory events when the polling circuitry indicates that the high current mode is unavailable."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Peak current management in a memory array","description":"An electronic device comprises a multi-chip package including multiple memory dice that include a memory array, charging circuitry, polling circuitry and a control unit. The charging circuitry is conf","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11495306","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11495306","citation_suggestion":"Patentable. \"Peak current management in a memory array\" (US-11495306). https://patentable.app/patents/US-11495306","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11495306","json":"https://patentable.app/api/llm-context/US-11495306","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T22:36:27.495Z"}