{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11495517","patent":{"patent_number":"US-11495517","title":"Packaging method and joint technology for an electronic device","assignee":null,"inventors":[],"filing_date":"2018-09-17T00:00:00.000Z","publication_date":"2022-11-08T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"A packaging method for power devices with optimized stacks of layers comprising different thermal expansion coefficients, the method including a stress relieving buffer technology designed to improve the thermal, electrical and mechanical contact between chips and electrodes. We disclose herein a buffer structure to provide stress relief between two layers of an electronic device, the buffer structure comprising: a plurality of discrete pillars closely packed together such that there is substantially no air gap between the plurality of conductive pillars, and wherein a height of each pillar is greater than a thickness of said pillar."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Packaging method and joint technology for an electronic device","description":"A packaging method for power devices with optimized stacks of layers comprising different thermal expansion coefficients, the method including a stress relieving buffer technology designed to improve ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11495517","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11495517","citation_suggestion":"Patentable. \"Packaging method and joint technology for an electronic device\" (US-11495517). https://patentable.app/patents/US-11495517","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11495517","json":"https://patentable.app/api/llm-context/US-11495517","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T14:29:48.266Z"}