{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11495672","patent":{"patent_number":"US-11495672","title":"Increased transistor source/drain contact area using sacrificial source/drain layer","assignee":null,"inventors":[],"filing_date":"2018-06-29T00:00:00.000Z","publication_date":"2022-11-08T00:00:00.000Z","cpc_codes":["B82Y","H01L"],"num_claims":19,"abstract":"Integrated circuit structures including increased transistor source/drain (S/D) contact area using a sacrificial S/D layer are provided herein. The sacrificial layer, which includes different material from the S/D material, is deposited into the S/D trenches prior to the epitaxial growth of that S/D material, such that the sacrificial layer acts as a space-holder below the S/D material. During S/D contact processing, the sacrificial layer can be selectively etched relative to the S/D material to at least partially remove it, leaving space below the S/D material for the contact metal to fill. In some cases, the contact metal is also between portions of the S/D material. In some cases, the contact metal wraps around the epi S/D, such as when dielectric wall structures on either side of the S/D region are employed. By increasing the S/D contact area, the contact resistance is reduced, thereby improving the performance of the transistor device."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Increased transistor source/drain contact area using sacrificial source/drain layer","description":"Integrated circuit structures including increased transistor source/drain (S/D) contact area using a sacrificial S/D layer are provided herein. The sacrificial layer, which includes different material","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11495672","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11495672","citation_suggestion":"Patentable. \"Increased transistor source/drain contact area using sacrificial source/drain layer\" (US-11495672). https://patentable.app/patents/US-11495672","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11495672","json":"https://patentable.app/api/llm-context/US-11495672","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T04:15:04.698Z"}