{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11496136","patent":{"patent_number":"US-11496136","title":"Clock generating circuit and a semiconductor system using the clock generating circuit","assignee":null,"inventors":[],"filing_date":"2021-10-04T00:00:00.000Z","publication_date":"2022-11-08T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F"],"num_claims":21,"abstract":"A clock generating circuit includes a first delay line, a second delay line, a selected phase mixing circuit and, a delay control circuit. The first delay line delays, based on a delay control signal, an input clock signal to generate a first delay clock signal. The second delay line delays, based on the delay control signal, the input clock signal to generate a second delay clock signal. The selected phase mixing circuit generates, based on a first selection signal and a second selection signal, an output clock signal from at least one between the first delay clock signal and the second delay clock signal. The delay control circuit monitors duty cycles of the first delay clock signal and the second delay clock signal to generate the first selection signal and the second selection signal thereby selecting at least one between the first delay line and the second delay line."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Clock generating circuit and a semiconductor system using the clock generating circuit","description":"A clock generating circuit includes a first delay line, a second delay line, a selected phase mixing circuit and, a delay control circuit. The first delay line delays, based on a delay control signal,","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11496136","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11496136","citation_suggestion":"Patentable. \"Clock generating circuit and a semiconductor system using the clock generating circuit\" (US-11496136). https://patentable.app/patents/US-11496136","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11496136","json":"https://patentable.app/api/llm-context/US-11496136","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T10:19:22.919Z"}