{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11500019","patent":{"patent_number":"US-11500019","title":"Area-aware test pattern coverage optimization","assignee":null,"inventors":[],"filing_date":"2020-05-14T00:00:00.000Z","publication_date":"2022-11-15T00:00:00.000Z","cpc_codes":["G06F"],"num_claims":16,"abstract":"In some embodiments, a method may include an area-aware optimization for the test patterns. The method may include dividing the chip area into a grid. The grid may be based on the smallest particle size. The method may include preparing test patterns and identifying a subset of test patterns that touch all of the grid locations. The subset may include a minimum number of test patterns from the prepared test patterns which when implemented exercise the all of the grid locations. The method allows to more quickly determine chips that fail due to extrinsic defects. Once a test fails during the testing process for a chip, testing on the chip is stopped and testing begins on the next chip. Rapidly identifying chips that fail due to extrinsic failures can decrease the overall test time and identify those that will fail quickly as the chip process matures and is dominated by extrinsic failures."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Area-aware test pattern coverage optimization","description":"In some embodiments, a method may include an area-aware optimization for the test patterns. The method may include dividing the chip area into a grid. The grid may be based on the smallest particle si","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11500019","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11500019","citation_suggestion":"Patentable. \"Area-aware test pattern coverage optimization\" (US-11500019). https://patentable.app/patents/US-11500019","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11500019","json":"https://patentable.app/api/llm-context/US-11500019","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T20:56:41.893Z"}