{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11500613","patent":{"patent_number":"US-11500613","title":"Memory unit with multiply-accumulate assist scheme for multi-bit convolutional neural network based computing-in-memory applications and computing method thereof","assignee":null,"inventors":[],"filing_date":"2020-02-06T00:00:00.000Z","publication_date":"2022-11-15T00:00:00.000Z","cpc_codes":["G06F","G06N","G06N","G06N","G11C","G11C","G11C","G11C","G06F","G06F","G11C","G11C","G11C"],"num_claims":20,"abstract":"A memory unit with a multiply-accumulate assist scheme for a plurality of multi-bit convolutional neural network based computing-in-memory applications is controlled by a reference voltage, a word line and a multi-bit input voltage. The memory unit includes a non-volatile memory cell, a voltage divider and a voltage keeper. The non-volatile memory cell is controlled by the word line and stores a weight. The voltage divider includes a data line and generates a charge current on the data line according to the reference voltage, and a voltage level of the data line is generated by the non-volatile memory cell and the charge current. The voltage keeper generates an output current on an output node according to the multi-bit input voltage and the voltage level of the data line, and the output current is corresponding to the multi-bit input voltage multiplied by the weight."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory unit with multiply-accumulate assist scheme for multi-bit convolutional neural network based computing-in-memory applications and computing method thereof","description":"A memory unit with a multiply-accumulate assist scheme for a plurality of multi-bit convolutional neural network based computing-in-memory applications is controlled by a reference voltage, a word lin","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11500613","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11500613","citation_suggestion":"Patentable. \"Memory unit with multiply-accumulate assist scheme for multi-bit convolutional neural network based computing-in-memory applications and computing method thereof\" (US-11500613). https://patentable.app/patents/US-11500613","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11500613","json":"https://patentable.app/api/llm-context/US-11500613","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T23:03:04.362Z"}