{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11502008","patent":{"patent_number":"US-11502008","title":"Dual strip backside metallization for improved alt-FLI plating, KOZ minimization, test enhancement and warpage control","assignee":null,"inventors":[],"filing_date":"2017-06-30T00:00:00.000Z","publication_date":"2022-11-15T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":13,"abstract":"An integrated circuit assembly including a substrate having a surface including at least one area including contact points operable for connection with an integrated circuit die; and at least one ring surrounding the at least one area, the at least one ring including an electrically conductive material. A method of forming an integrated circuit assembly including forming a plurality of electrically conductive rings around a periphery of a die area of a substrate selected for attachment of at least one integrated circuit die, wherein the plurality of rings are formed one inside the other; and forming a plurality of contact points in the die area."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Dual strip backside metallization for improved alt-FLI plating, KOZ minimization, test enhancement and warpage control","description":"An integrated circuit assembly including a substrate having a surface including at least one area including contact points operable for connection with an integrated circuit die; and at least one ring","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11502008","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11502008","citation_suggestion":"Patentable. \"Dual strip backside metallization for improved alt-FLI plating, KOZ minimization, test enhancement and warpage control\" (US-11502008). https://patentable.app/patents/US-11502008","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11502008","json":"https://patentable.app/api/llm-context/US-11502008","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T19:46:24.735Z"}