{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11502054","patent":{"patent_number":"US-11502054","title":"Semiconductor device assembly and method therefor","assignee":null,"inventors":[],"filing_date":"2020-11-11T00:00:00.000Z","publication_date":"2022-11-15T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":11,"abstract":"A method of forming a packaged semiconductor device includes attaching a backside surface of a semiconductor die to a major surface of a package substrate. A first conductive connector is formed over a portion of an active surface of the semiconductor die and a portion of the major surface of the package substrate. A first conductive connection between a first bond pad of the semiconductor die and a first substrate pad of the package substrate is formed by way of the first conductive connector. A bond wire connects a second bond pad of the semiconductor die to a second substrate pad of the package substrate. The first bond pad located between the second bond pad and an edge of the semiconductor die."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor device assembly and method therefor","description":"A method of forming a packaged semiconductor device includes attaching a backside surface of a semiconductor die to a major surface of a package substrate. A first conductive connector is formed over ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11502054","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11502054","citation_suggestion":"Patentable. \"Semiconductor device assembly and method therefor\" (US-11502054). https://patentable.app/patents/US-11502054","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11502054","json":"https://patentable.app/api/llm-context/US-11502054","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T23:11:01.341Z"}