{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11507275","patent":{"patent_number":"US-11507275","title":"Memory unit with multi-bit input local computing cell for multi-bit convolutional neural network based computing-in-memory applications, memory array structure with multi-bit input local computing cell for multi-bit convolutional neural network based computing-in-memory applications and computing method thereof","assignee":null,"inventors":[],"filing_date":"2020-10-27T00:00:00.000Z","publication_date":"2022-11-22T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06N","G06N","G06N","G11C","G11C","G11C","G11C"],"num_claims":17,"abstract":"A memory unit is controlled by a first word line and a second word line. The memory unit includes a memory cell and a multi-bit input local computing cell. The memory cell stores a weight. The memory cell is controlled by the first word line and includes a local bit line transmitting the weight. The multi-bit input local computing cell is connected to the memory cell and receives the weight via the local bit line. The multi-bit input local computing cell includes a plurality of input lines and a plurality of output lines. Each of the input lines transmits a multi-bit input value, and the multi-bit input local computing cell is controlled by the second word line to generate a multi-bit output value on each of the output lines according to the multi-bit input value multiplied by the weight."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory unit with multi-bit input local computing cell for multi-bit convolutional neural network based computing-in-memory applications, memory array structure with multi-bit input local computing cell for multi-bit convolutional neural network based computing-in-memory applications and computing method thereof","description":"A memory unit is controlled by a first word line and a second word line. The memory unit includes a memory cell and a multi-bit input local computing cell. The memory cell stores a weight. The memory ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11507275","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11507275","citation_suggestion":"Patentable. \"Memory unit with multi-bit input local computing cell for multi-bit convolutional neural network based computing-in-memory applications, memory array structure with multi-bit input local computing cell for multi-bit convolutional neural network based computing-in-memory applications and computing method thereof\" (US-11507275). https://patentable.app/patents/US-11507275","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11507275","json":"https://patentable.app/api/llm-context/US-11507275","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T05:55:46.373Z"}