{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11507421","patent":{"patent_number":"US-11507421","title":"Information handling system and method to allocate peripheral component interconnect express (PCIe) bus resources","assignee":null,"inventors":[],"filing_date":"2019-06-11T00:00:00.000Z","publication_date":"2022-11-22T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":22,"abstract":"Information handling systems (IHSs) and methods are provided herein to allocate Peripheral Component Interconnect Express (PCIe) bus resources to a plurality of PCIe slots according to various PCIe bus resource allocation option settings. At least one host processor is included within the IHS for executing program instructions to detect a PCIe bus allocation option setting selected from a plurality of options provided in a boot firmware setup menu; determine if the PCIe bus allocation option setting has changed since the IHS was last booted; and allocate PCIe bus resources to the plurality of PCIe slots according to the detected PCIe bus allocation option setting. The plurality of options provided in the boot firmware setup menu include at least an auto detect option, which when selected, enables the at least one host processor to automatically detect unused PCIe slots and reallocate PCIe bus resources to used PCIe slots."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Information handling system and method to allocate peripheral component interconnect express (PCIe) bus resources","description":"Information handling systems (IHSs) and methods are provided herein to allocate Peripheral Component Interconnect Express (PCIe) bus resources to a plurality of PCIe slots according to various PCIe bu","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11507421","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11507421","citation_suggestion":"Patentable. \"Information handling system and method to allocate peripheral component interconnect express (PCIe) bus resources\" (US-11507421). https://patentable.app/patents/US-11507421","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11507421","json":"https://patentable.app/api/llm-context/US-11507421","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T16:26:05.771Z"}