{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11508669","patent":{"patent_number":"US-11508669","title":"Method and apparatus for improved circuit structure thermal reliability on printed circuit board materials","assignee":null,"inventors":[],"filing_date":"2019-08-30T00:00:00.000Z","publication_date":"2022-11-22T00:00:00.000Z","cpc_codes":["H01L","G06F","G06F","H01L","H01L","H01L","H01L","H01L","G06F","G06F","G06F","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":17,"abstract":"A structure is provided that reduces the stress generated in a semiconductor device package during cooling subsequent to solder reflow operations for coupling semiconductor devices to a printed circuit board (PCB). Stress reduction is provided by coupling solder lands to metal-layer structures using traces on the PCB that are oriented approximately perpendicular to lines from an expansion neutral point associated with the package. In many cases, especially where the distribution of solder lands of the semiconductor device package are uniform, the expansion neutral point is in the center of the semiconductor device package. PCB traces having such an orientation experience reduced stress due to thermal-induced expansion and contraction as compared to traces having an orientation along a line to the expansion neutral point."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method and apparatus for improved circuit structure thermal reliability on printed circuit board materials","description":"A structure is provided that reduces the stress generated in a semiconductor device package during cooling subsequent to solder reflow operations for coupling semiconductor devices to a printed circui","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11508669","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11508669","citation_suggestion":"Patentable. \"Method and apparatus for improved circuit structure thermal reliability on printed circuit board materials\" (US-11508669). https://patentable.app/patents/US-11508669","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11508669","json":"https://patentable.app/api/llm-context/US-11508669","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T05:11:10.455Z"}