{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11515228","patent":{"patent_number":"US-11515228","title":"Double sided semiconductor package","assignee":null,"inventors":[],"filing_date":"2021-01-13T00:00:00.000Z","publication_date":"2022-11-29T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":13,"abstract":"A semiconductor package includes an encapsulant body; an upper electrically conductive element having an outwardly exposed metal surface; a lower carrier substrate having an upper electrically conductive layer, a lower electrically conductive layer having an outwardly exposed surface, and an electrical insulation layer; a first electrically conductive spacer between the upper electrically conductive element and the upper electrically conductive layer; a power semiconductor chip between the upper electrically conductive element and the upper electrically conductive layer; and a second electrically conductive spacer between the upper electrically conductive element and the power semiconductor chip, a first carrier region of the upper electrically conductive layer is connected to a first power terminal, a second carrier region of the upper electrically conductive layer is alongside the first carrier region and is connected to a phase terminal, a first region of the upper electrically conductive element is connected to a second power terminal."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Double sided semiconductor package","description":"A semiconductor package includes an encapsulant body; an upper electrically conductive element having an outwardly exposed metal surface; a lower carrier substrate having an upper electrically conduct","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11515228","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11515228","citation_suggestion":"Patentable. \"Double sided semiconductor package\" (US-11515228). https://patentable.app/patents/US-11515228","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11515228","json":"https://patentable.app/api/llm-context/US-11515228","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T05:51:20.047Z"}