{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11515268","patent":{"patent_number":"US-11515268","title":"Semiconductor package and manufacturing method thereof","assignee":null,"inventors":[],"filing_date":"2021-03-05T00:00:00.000Z","publication_date":"2022-11-29T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"A semiconductor package has central region and peripheral region surrounding central region. The semiconductor package includes dies, encapsulant, and redistribution structure. The dies include functional die and first dummy dies. Functional die is disposed in central region. First dummy dies are disposed in peripheral region. Redistribution structure is disposed on encapsulant over the dies, and is electrically connected to functional die. Vacancy ratio of central region is in the range from 1.01 to 3.00. Vacancy ratio of the peripheral region is in the range from 1.01 to 3.00. Vacancy ratio of central region is a ratio of total area of central region to total area occupied by dies disposed in central region. Vacancy ratio of peripheral region is a ratio of total area of peripheral region to total area occupied by first dummy dies disposed in peripheral region."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor package and manufacturing method thereof","description":"A semiconductor package has central region and peripheral region surrounding central region. The semiconductor package includes dies, encapsulant, and redistribution structure. The dies include functi","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11515268","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11515268","citation_suggestion":"Patentable. \"Semiconductor package and manufacturing method thereof\" (US-11515268). https://patentable.app/patents/US-11515268","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11515268","json":"https://patentable.app/api/llm-context/US-11515268","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T14:31:32.753Z"}