{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11515332","patent":{"patent_number":"US-11515332","title":"Ferroelectric memory device and method of forming the same","assignee":null,"inventors":[],"filing_date":"2020-12-01T00:00:00.000Z","publication_date":"2022-11-29T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"A memory cell includes a transistor over a semiconductor substrate. The transistor includes a ferroelectric layer arranged along a sidewall of a word line. The ferroelectric layer includes a species with valence of 5, valence of 7, or a combination thereof. An oxide semiconductor layer is electrically coupled to a source line and a bit line. The ferroelectric layer is disposed between the oxide semiconductor layer and the word line."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Ferroelectric memory device and method of forming the same","description":"A memory cell includes a transistor over a semiconductor substrate. The transistor includes a ferroelectric layer arranged along a sidewall of a word line. The ferroelectric layer includes a species w","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11515332","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11515332","citation_suggestion":"Patentable. \"Ferroelectric memory device and method of forming the same\" (US-11515332). https://patentable.app/patents/US-11515332","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11515332","json":"https://patentable.app/api/llm-context/US-11515332","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T12:44:24.018Z"}