{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11520370","patent":{"patent_number":"US-11520370","title":"Delay element, delay element chain and fast all-digital clock frequency adaptation circuit for voltage droop tolerance","assignee":null,"inventors":[],"filing_date":"2019-03-11T00:00:00.000Z","publication_date":"2022-12-06T00:00:00.000Z","cpc_codes":["G06F","G11C","G11C"],"num_claims":10,"abstract":"A circuit for delaying an electric signal (CI), comprises an input for the electric signal (CI); an input for a control signal (EI); a first storage element (U5) for storing the control signal; a delay element for delaying the electric signal; and an output for the delayed electric signal (CO). According to the invention, the electric signal is delayed, based on the stored control signal. The delay circuit is employed in a fast all-digital clock frequency adaptation circuit for voltage droop tolerance."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Delay element, delay element chain and fast all-digital clock frequency adaptation circuit for voltage droop tolerance","description":"A circuit for delaying an electric signal (CI), comprises an input for the electric signal (CI); an input for a control signal (EI); a first storage element (U5) for storing the control signal; a dela","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11520370","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11520370","citation_suggestion":"Patentable. \"Delay element, delay element chain and fast all-digital clock frequency adaptation circuit for voltage droop tolerance\" (US-11520370). https://patentable.app/patents/US-11520370","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11520370","json":"https://patentable.app/api/llm-context/US-11520370","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T18:14:45.821Z"}