{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11520529","patent":{"patent_number":"US-11520529","title":"Signal development caching in a memory device","assignee":null,"inventors":[],"filing_date":"2019-12-20T00:00:00.000Z","publication_date":"2022-12-06T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G06F","G06F","G06F","G06F","G06F","G06F","G11C","G11C","G11C"],"num_claims":26,"abstract":"Methods, systems, and devices related to signal development caching in a memory device are described. In one example, a memory device in accordance with the described techniques may include a memory array, a sense amplifier array, and a signal development cache configured to store signals (e.g., cache signals, signal states) associated with logic states (e.g., memory states) that may be stored at the memory array (e.g., according to various read or write operations). In various examples, accessing the memory device may include accessing information from the signal development cache, or the memory array, or both, based on various mappings or operations of the memory device."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Signal development caching in a memory device","description":"Methods, systems, and devices related to signal development caching in a memory device are described. In one example, a memory device in accordance with the described techniques may include a memory a","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11520529","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11520529","citation_suggestion":"Patentable. \"Signal development caching in a memory device\" (US-11520529). https://patentable.app/patents/US-11520529","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11520529","json":"https://patentable.app/api/llm-context/US-11520529","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T11:51:49.479Z"}