{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11520653","patent":{"patent_number":"US-11520653","title":"System and method for controlling faults in system-on-chip","assignee":null,"inventors":[],"filing_date":"2020-10-15T00:00:00.000Z","publication_date":"2022-12-06T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F"],"num_claims":18,"abstract":"A system-on-chip (SoC) is disclosed. The SoC includes a fault controlling circuit and processing circuits. The fault controlling circuit is configured to receive fault events generated by fault sources of the SoC and categorize the fault events based on a priority associated with each fault event. The fault controlling circuit is further configured to identify corresponding fault reactions for the categorized fault events and generate a set of recovery signals based on the identified fault reactions. The processing circuits are configured to receive the fault events, and further configured to receive the set of recovery signals to recover from the fault events. The fault controlling circuit thus acts as a central control system for controlling faults in the SoC."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"System and method for controlling faults in system-on-chip","description":"A system-on-chip (SoC) is disclosed. The SoC includes a fault controlling circuit and processing circuits. The fault controlling circuit is configured to receive fault events generated by fault source","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11520653","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11520653","citation_suggestion":"Patentable. \"System and method for controlling faults in system-on-chip\" (US-11520653). https://patentable.app/patents/US-11520653","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11520653","json":"https://patentable.app/api/llm-context/US-11520653","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T15:36:55.718Z"}