{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11520729","patent":{"patent_number":"US-11520729","title":"I2C bus architecture using shared clock and dedicated data lines","assignee":null,"inventors":[],"filing_date":"2021-05-04T00:00:00.000Z","publication_date":"2022-12-06T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F"],"num_claims":30,"abstract":"Systems, methods, apparatus and techniques are described that provide point-to-point capabilities without the expected increase in input/output pad usage. In some examples, point-to-point data lines are provided between a host and multiple slave devices and timing of communication is controlled using a clock signal shared by the multiple slave devices. An apparatus has a plurality of bus master circuits configured to control point-to-point communication with corresponding slave devices and a clock generation circuit configured to provide pulses in a serial bus clock signal when one or more bus master circuits are in an active state, and further to idle the serial bus clock signal when all bus master circuits are idle. Each bus master circuit may be configured to communicate with its corresponding slave device in accordance with the timing provided by the serial bus clock signal that is transmitted over a common clock line to each slave device."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"I2C bus architecture using shared clock and dedicated data lines","description":"Systems, methods, apparatus and techniques are described that provide point-to-point capabilities without the expected increase in input/output pad usage. In some examples, point-to-point data lines a","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11520729","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11520729","citation_suggestion":"Patentable. \"I2C bus architecture using shared clock and dedicated data lines\" (US-11520729). https://patentable.app/patents/US-11520729","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11520729","json":"https://patentable.app/api/llm-context/US-11520729","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T15:11:59.485Z"}