{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11521680","patent":{"patent_number":"US-11521680","title":"Memory device with on-chip sacrificial memory cells","assignee":null,"inventors":[],"filing_date":"2020-12-31T00:00:00.000Z","publication_date":"2022-12-06T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":18,"abstract":"An integrated circuit includes a primary memory array with cells switchable between first and second states. The circuit also includes sacrificial memory cells; each fabricated to be switchable between the first and second states and associated with at least one row of the primary array. A controller is configured to detect a write operation to a row of the primary array, stress a sacrificial cell associated with the row and detect a failure of the associated sacrificial cell. The sacrificial cells are fabricated to have lower write-cycle endurance than cells of the primary array or are subjected to more stress. Failure of a row of the primary array is predicted based, at least in part, on a detected failure of the associated sacrificial cell."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory device with on-chip sacrificial memory cells","description":"An integrated circuit includes a primary memory array with cells switchable between first and second states. The circuit also includes sacrificial memory cells; each fabricated to be switchable betwee","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11521680","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11521680","citation_suggestion":"Patentable. \"Memory device with on-chip sacrificial memory cells\" (US-11521680). https://patentable.app/patents/US-11521680","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11521680","json":"https://patentable.app/api/llm-context/US-11521680","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T18:25:25.691Z"}