{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11521691","patent":{"patent_number":"US-11521691","title":"Triggering next state verify in program loop for nonvolatile memory","assignee":null,"inventors":[],"filing_date":"2021-06-02T00:00:00.000Z","publication_date":"2022-12-06T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"Apparatus and methods are described to program memory cells and control bit line discharge schemes during programming based on the data pattern. The memory controller can predict program data pattern based on SLC pulse number and TLC data completion signals and use these signals to adjust when the inhibited bit lines can discharge. Once a TLC program operation have more one data, the memory controller will enable EQVDDSA_PROG to equalize to VDDSA, and then discharge. In SLC program, the memory controller will enable EQVDDSA_PROG only in first program pulse and disable it thereafter."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Triggering next state verify in program loop for nonvolatile memory","description":"Apparatus and methods are described to program memory cells and control bit line discharge schemes during programming based on the data pattern. The memory controller can predict program data pattern ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11521691","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11521691","citation_suggestion":"Patentable. \"Triggering next state verify in program loop for nonvolatile memory\" (US-11521691). https://patentable.app/patents/US-11521691","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11521691","json":"https://patentable.app/api/llm-context/US-11521691","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T21:10:22.254Z"}