{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11521986","patent":{"patent_number":"US-11521986","title":"Interconnect structures of three-dimensional memory devices","assignee":null,"inventors":[],"filing_date":"2021-01-18T00:00:00.000Z","publication_date":"2022-12-06T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C"],"num_claims":7,"abstract":"Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a method for forming a 3D memory device is disclosed. A dielectric stack including interleaved sacrificial layers and dielectric layers is formed above a substrate. A channel structure extending vertically through the dielectric stack is formed. A local dielectric layer is formed on the dielectric stack. A channel local contact opening through the local dielectric layer to expose an upper end of the channel structure, and a slit opening extending vertically through the local dielectric layer and the dielectric stack are simultaneously formed. A memory stack including interleaved conductive layers and the dielectric layers is formed by replacing, through the slit opening, the sacrificial layers with the conductive layers. A channel local contact in the channel local contact opening, and a slit structure in the slit opening are simultaneously formed."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Interconnect structures of three-dimensional memory devices","description":"Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a method for forming a 3D memory device is disclosed. A dielectric stack including interleaved sacrifici","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11521986","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11521986","citation_suggestion":"Patentable. \"Interconnect structures of three-dimensional memory devices\" (US-11521986). https://patentable.app/patents/US-11521986","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11521986","json":"https://patentable.app/api/llm-context/US-11521986","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T14:06:58.670Z"}