{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11526279","patent":{"patent_number":"US-11526279","title":"Technologies for performing column architecture-aware scrambling","assignee":null,"inventors":[],"filing_date":"2020-05-12T00:00:00.000Z","publication_date":"2022-12-13T00:00:00.000Z","cpc_codes":["G06F","H04L","G06F","G06F","G06F","G06F","G06F","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06N","G06N"],"num_claims":18,"abstract":"Technologies for scrambling functions in a column-addressable memory architecture includes a device having a memory and a circuitry. The memory includes a matrix storing individually addressable bit data, and the matrix is formed by rows and columns. The circuitry is to receive a request to perform a write operation of one or more bit values to one of the columns. The circuitry is further to determine a scrambler state at each location of the column, the location corresponding to a respective row and column index. The scrambler state is indicative of a function used to determine a value at the respective column location. Each of the bit values is scrambled as a function of the scrambler state for the respective column location and written thereto."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Technologies for performing column architecture-aware scrambling","description":"Technologies for scrambling functions in a column-addressable memory architecture includes a device having a memory and a circuitry. The memory includes a matrix storing individually addressable bit d","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11526279","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11526279","citation_suggestion":"Patentable. \"Technologies for performing column architecture-aware scrambling\" (US-11526279). https://patentable.app/patents/US-11526279","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11526279","json":"https://patentable.app/api/llm-context/US-11526279","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T09:23:39.002Z"}