{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11527295","patent":{"patent_number":"US-11527295","title":"Nonvolatile memory device with page buffer circuit supporting read operation of improved reliabilty","assignee":null,"inventors":[],"filing_date":"2021-03-12T00:00:00.000Z","publication_date":"2022-12-13T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":12,"abstract":"Disclosed are a nonvolatile memory device and a read method of the nonvolatile memory device. The nonvolatile memory device includes a memory cell array, a row decoder circuit, and a page buffer circuit including first latches and second latches. The page buffer circuit respectively latches first sensing values, which are based on data stored in adjacent memory cells, at the first latches and respectively latches second sensing values, which are based on data stored in selected memory cells, at the second latches at least two times."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Nonvolatile memory device with page buffer circuit supporting read operation of improved reliabilty","description":"Disclosed are a nonvolatile memory device and a read method of the nonvolatile memory device. The nonvolatile memory device includes a memory cell array, a row decoder circuit, and a page buffer circu","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11527295","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11527295","citation_suggestion":"Patentable. \"Nonvolatile memory device with page buffer circuit supporting read operation of improved reliabilty\" (US-11527295). https://patentable.app/patents/US-11527295","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11527295","json":"https://patentable.app/api/llm-context/US-11527295","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T11:57:49.379Z"}