{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11532343","patent":{"patent_number":"US-11532343","title":"Memory array including dummy regions","assignee":null,"inventors":[],"filing_date":"2020-10-06T00:00:00.000Z","publication_date":"2022-12-20T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"3D memory arrays including dummy conductive lines and methods of forming the same are disclosed. In an embodiment, a memory array includes a ferroelectric (FE) material over a semiconductor substrate, the FE material including vertical sidewalls in contact with a word line; an oxide semiconductor (OS) layer over the FE material, the OS layer contacting a source line and a bit line, the FE material being between the OS layer and the word line; a transistor including a portion of the FE material, a portion of the word line, a portion of the OS layer, a portion of the source line, and a portion of the bit line; and a first dummy word line between the transistor and the semiconductor substrate, the FE material further including first tapered sidewalls in contact with the first dummy word line."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory array including dummy regions","description":"3D memory arrays including dummy conductive lines and methods of forming the same are disclosed. In an embodiment, a memory array includes a ferroelectric (FE) material over a semiconductor substrate,","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11532343","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11532343","citation_suggestion":"Patentable. \"Memory array including dummy regions\" (US-11532343). https://patentable.app/patents/US-11532343","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11532343","json":"https://patentable.app/api/llm-context/US-11532343","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T01:19:42.616Z"}