{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11935890","patent":{"patent_number":"US-11935890","title":"Method for forming integrated semiconductor device with 2D material layer","assignee":null,"inventors":[],"filing_date":"2022-04-11T00:00:00.000Z","publication_date":"2024-03-19T00:00:00.000Z","cpc_codes":["B82Y","H01L","H01L","H01L","H01L","H04L","H04L","H04L"],"num_claims":20,"abstract":"In a method for forming an integrated semiconductor device, a first inter-layer dielectric (ILD) layer is formed over a semiconductor device that includes a first transistor structure, a two-dimensional (2D) material layer is formed over and in contact with the first ILD layer, the 2D material layer is patterned to form a channel layer of a second transistor structure, a source electrode and a drain electrode of the second transistor structure are formed over the patterned 2D material layer and laterally spaced apart from each other, a gate dielectric layer of the second transistor structure is formed over the patterned 2D material layer, the source electrode and the drain electrode, and a gate electrode of the second transistor structure is formed over the gate dielectric layer and laterally between the source electrode and the drain electrode."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method for forming integrated semiconductor device with 2D material layer","description":"In a method for forming an integrated semiconductor device, a first inter-layer dielectric (ILD) layer is formed over a semiconductor device that includes a first transistor structure, a two-dimension","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11935890","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11935890","citation_suggestion":"Patentable. \"Method for forming integrated semiconductor device with 2D material layer\" (US-11935890). https://patentable.app/patents/US-11935890","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11935890","json":"https://patentable.app/api/llm-context/US-11935890","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T21:10:40.694Z"}