{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11941251","patent":{"patent_number":"US-11941251","title":"Nonvolatile memory including intermediate buffer and input/output buffer and memory system including the nonvolatile memory","assignee":null,"inventors":[],"filing_date":"2022-11-08T00:00:00.000Z","publication_date":"2024-03-26T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F"],"num_claims":10,"abstract":"According to one embodiment, there is provided a nonvolatile memory including a memory cell array, an input/output buffer, one or more intermediate buffers, and a control circuit. The memory cell array includes a plurality of pages. Each of the one or more intermediate buffers is electrically connected between the memory cell array and the input/output buffer. The control circuit is configured to store, in a first intermediate buffer, data read through sensing operation from a first page out of the plurality of pages in accordance with a first command that includes a sensing operation instruction and designation of the first intermediate buffer among the one or more intermediate buffers."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Nonvolatile memory including intermediate buffer and input/output buffer and memory system including the nonvolatile memory","description":"According to one embodiment, there is provided a nonvolatile memory including a memory cell array, an input/output buffer, one or more intermediate buffers, and a control circuit. The memory cell arra","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11941251","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11941251","citation_suggestion":"Patentable. \"Nonvolatile memory including intermediate buffer and input/output buffer and memory system including the nonvolatile memory\" (US-11941251). https://patentable.app/patents/US-11941251","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11941251","json":"https://patentable.app/api/llm-context/US-11941251","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T13:17:14.466Z"}