{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11942167","patent":{"patent_number":"US-11942167","title":"Fuse array layout pattern and related apparatuses, systems, and methods","assignee":null,"inventors":[],"filing_date":"2020-02-24T00:00:00.000Z","publication_date":"2024-03-26T00:00:00.000Z","cpc_codes":["G11C","G11C"],"num_claims":8,"abstract":"Systems, methods, and apparatuses relating to interlocking transistor active regions are disclosed. An apparatus includes a gate including electrically conductive material and an active material including a doped semiconductor material. A portion of the active material overlapped by the gate has an at least substantially triangular shape. An apparatus includes a plurality of active materials. Each active material includes tapered ends and a plurality of gates. The plurality of active materials is arranged in an interlocking pattern with at least some tapered ends of the active materials interlocking with at least some others of the tapered ends. The plurality of gates overlaps the interlocked tapered ends of the plurality of active materials."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Fuse array layout pattern and related apparatuses, systems, and methods","description":"Systems, methods, and apparatuses relating to interlocking transistor active regions are disclosed. An apparatus includes a gate including electrically conductive material and an active material inclu","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11942167","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11942167","citation_suggestion":"Patentable. \"Fuse array layout pattern and related apparatuses, systems, and methods\" (US-11942167). https://patentable.app/patents/US-11942167","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11942167","json":"https://patentable.app/api/llm-context/US-11942167","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T18:36:33.662Z"}