{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11947994","patent":{"patent_number":"US-11947994","title":"Adaptive hardware transactional memory based concurrency control","assignee":null,"inventors":[],"filing_date":"2019-03-28T00:00:00.000Z","publication_date":"2024-04-02T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":16,"abstract":"A method may include determining a threshold quantity of attempts to optimistically perform a first transaction operating data stored in a database. The threshold quantity of attempts may be determined based on an expected workload of the first transaction and/or a workload at the database. The first transaction may be performed optimistically including by tracking cache lines accessed by the first transaction and detecting, based on a second transaction writing to a cache line accessed by the first transaction, a conflict between the first transaction and the second transaction. If the first transaction is not successful performed after the threshold quantity of attempts to optimistically perform the first transaction, the first transaction may be performed in a fallback mode including by acquiring a lock to prevent the second transaction from accessing a same data in the database as the first transaction. Related systems and articles of manufacture are also provided."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Adaptive hardware transactional memory based concurrency control","description":"A method may include determining a threshold quantity of attempts to optimistically perform a first transaction operating data stored in a database. The threshold quantity of attempts may be determine","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11947994","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11947994","citation_suggestion":"Patentable. \"Adaptive hardware transactional memory based concurrency control\" (US-11947994). https://patentable.app/patents/US-11947994","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11947994","json":"https://patentable.app/api/llm-context/US-11947994","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T18:39:31.298Z"}