{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11948797","patent":{"patent_number":"US-11948797","title":"Method for manufacturing semiconductor device","assignee":null,"inventors":[],"filing_date":"2019-04-26T00:00:00.000Z","publication_date":"2024-04-02T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L"],"num_claims":6,"abstract":"A lower resist (2) is applied on a semiconductor substrate (1). An upper resist (3) is applied on the lower resist (2). A first opening (4) is formed in the upper resist (3) by exposure and development and the lower resist (2) is dissolved with a developer upon the development to form a second opening (5) having a width wider than that of the first opening (4) below the first opening (4) so that a resist pattern (6) in a shape of an eave having an undercut is formed. Baking is performed to thermally shrink the upper resist (3) to bent an eave portion (7) of the upper resist (3) upward. After the baking, a metal film (8) is formed on the resist pattern (6) and on the semiconductor substrate (1) exposed at the second opening (5). The resist pattern (6) and the metal film (8) is removed on the resist pattern (6) and the metal film (8) is left on the semiconductor substrate (1) as an electrode (9)."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method for manufacturing semiconductor device","description":"A lower resist (2) is applied on a semiconductor substrate (1). An upper resist (3) is applied on the lower resist (2). A first opening (4) is formed in the upper resist (3) by exposure and developmen","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11948797","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11948797","citation_suggestion":"Patentable. \"Method for manufacturing semiconductor device\" (US-11948797). https://patentable.app/patents/US-11948797","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11948797","json":"https://patentable.app/api/llm-context/US-11948797","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T02:41:21.792Z"}