{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11950399","patent":{"patent_number":"US-11950399","title":"Bonded semiconductor devices having processor and static random-access memory and methods for forming the same","assignee":null,"inventors":[],"filing_date":"2021-11-11T00:00:00.000Z","publication_date":"2024-04-02T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"Embodiments of semiconductor devices and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first semiconductor structure including a device layer, a first interconnect layer, and a first bonding layer. The device layer includes a processor and a logic circuit, and the first bonding layer includes a first bonding contact. The semiconductor device also includes a second semiconductor structure including an array of static random-access memory (SRAM) cells, a second interconnect layer, and a second bonding layer including a second bonding contact. The first bonding contact is in contact with the second bonding contact. The processor is electrically connected to the array of SRAM cells through the first interconnect layer, the first bonding contact, the second bonding contact, and the second interconnect layer. The logic circuit is electrically connected to the array of SRAM cells through the first interconnect layer, the first bonding contact, the second bonding contact, and the second interconnect layer."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Bonded semiconductor devices having processor and static random-access memory and methods for forming the same","description":"Embodiments of semiconductor devices and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first semiconductor structure including a device layer, a first int","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11950399","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11950399","citation_suggestion":"Patentable. \"Bonded semiconductor devices having processor and static random-access memory and methods for forming the same\" (US-11950399). https://patentable.app/patents/US-11950399","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11950399","json":"https://patentable.app/api/llm-context/US-11950399","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T09:23:53.693Z"}