{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11955981","patent":{"patent_number":"US-11955981","title":"Divided quad clock-based inter-die clocking in a three-dimensional stacked memory device","assignee":null,"inventors":[],"filing_date":"2022-04-19T00:00:00.000Z","publication_date":"2024-04-09T00:00:00.000Z","cpc_codes":["G11C","G11C"],"num_claims":22,"abstract":"A memory device includes a clock input configured to receive a clock from a host device. The memory device also includes a command input configured to receive command and address bits from the host device. The memory device further includes multiple die stacked in a three-dimensional stack. A first die of the plurality of die includes a first plurality of memory cells and first local control circuitry. The first local circuitry includes division circuitry configured to receive the clock from the clock input, generate a divided clock having a lower frequency than that of the clock, and generate multiple clocks from the divided clock with each of the multiple clocks having a lower frequency than the divided clock. The memory device also includes one or more transmitters configured to transmit the multiple clocks using a inter-die interconnects between the multiple die."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Divided quad clock-based inter-die clocking in a three-dimensional stacked memory device","description":"A memory device includes a clock input configured to receive a clock from a host device. The memory device also includes a command input configured to receive command and address bits from the host de","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11955981","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11955981","citation_suggestion":"Patentable. \"Divided quad clock-based inter-die clocking in a three-dimensional stacked memory device\" (US-11955981). https://patentable.app/patents/US-11955981","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11955981","json":"https://patentable.app/api/llm-context/US-11955981","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T08:38:35.603Z"}