{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11956946","patent":{"patent_number":"US-11956946","title":"Method for forming a semiconductor memory structure","assignee":null,"inventors":[],"filing_date":"2022-05-16T00:00:00.000Z","publication_date":"2024-04-09T00:00:00.000Z","cpc_codes":["H01L","H01L","G11C"],"num_claims":13,"abstract":"The semiconductor structure manufacturing method includes the steps of: providing a substrate with bit line contact regions and isolation regions located between adjacent bit line contact regions; forming a groove in the substrate, the bottom of the groove exposes the bit line contact region and the isolation region adjacent to the bit line contact region; forming a contact region isolation layer covering at least sidewalls of the groove; and forming a contact region to cover the contact region isolating the surface of the layer and filling the bit line contact layer of the groove, the bit line contact layer being in contact with the bit line contact region at the bottom of the groove; forming a bit line layer on the bit line contact layer. The invention avoids damage to the sidewalls of the active region in the substrate."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method for forming a semiconductor memory structure","description":"The semiconductor structure manufacturing method includes the steps of: providing a substrate with bit line contact regions and isolation regions located between adjacent bit line contact regions; for","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11956946","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11956946","citation_suggestion":"Patentable. \"Method for forming a semiconductor memory structure\" (US-11956946). https://patentable.app/patents/US-11956946","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11956946","json":"https://patentable.app/api/llm-context/US-11956946","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T08:38:36.243Z"}