{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11960408","patent":{"patent_number":"US-11960408","title":"Semiconductor memory device including unit page buffer blocks having four page buffer pairs","assignee":null,"inventors":[],"filing_date":"2022-11-07T00:00:00.000Z","publication_date":"2024-04-16T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G11C","G11C","G11C","G06F","G06F","G11C","G11C"],"num_claims":19,"abstract":"A unit page buffer block includes first to fourth page buffer pairs. Each of the page buffer pairs includes a common column decoder block; and an upper page buffer stage and a lower page buffer stage electrically and commonly connected to the common column decoder block. Each of the upper page buffer stages includes an upper selection block; an upper latch block; and an upper cache block. Each of the lower page buffer stage includes a lower selection block; a lower latch block; and a lower cache block. Each of the upper selection blocks includes first to fourth sub-selection blocks. Each of the upper and lower latch blocks includes first to twelfth upper sub-latch blocks. Each of the upper and lower cache blocks includes first to twelfth upper sub-cache blocks. Each of the common column decoder block includes first to third sub-common column decoder blocks arranged in a row direction."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor memory device including unit page buffer blocks having four page buffer pairs","description":"A unit page buffer block includes first to fourth page buffer pairs. Each of the page buffer pairs includes a common column decoder block; and an upper page buffer stage and a lower page buffer stage ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11960408","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11960408","citation_suggestion":"Patentable. \"Semiconductor memory device including unit page buffer blocks having four page buffer pairs\" (US-11960408). https://patentable.app/patents/US-11960408","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11960408","json":"https://patentable.app/api/llm-context/US-11960408","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T06:30:55.413Z"}