{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11960416","patent":{"patent_number":"US-11960416","title":"Multichannel memory arbitration and interleaving scheme","assignee":null,"inventors":[],"filing_date":"2021-12-21T00:00:00.000Z","publication_date":"2024-04-16T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F"],"num_claims":20,"abstract":"Techniques including a memory controller with a set of memory channel queues, wherein memory channel queues of the set of memory channel queues correspond to memory channels to access a set of memory modules, a first arbitration module, and a second arbitration module. The memory controller is configured to receive a first memory request from the peripheral and place one or more portions of the first memory request in the memory channel queues of the set of memory channel queues. The first arbitration module is configured to determine an arbitration algorithm, select a first memory channel queue based on the arbitration algorithm, present the one or more portions of the first memory request in the selected first memory channel queue to the second arbitration module, and output the presented one or more portions of the first memory request based on a selection by the second arbitration module."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Multichannel memory arbitration and interleaving scheme","description":"Techniques including a memory controller with a set of memory channel queues, wherein memory channel queues of the set of memory channel queues correspond to memory channels to access a set of memory ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11960416","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11960416","citation_suggestion":"Patentable. \"Multichannel memory arbitration and interleaving scheme\" (US-11960416). https://patentable.app/patents/US-11960416","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11960416","json":"https://patentable.app/api/llm-context/US-11960416","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T04:11:47.322Z"}