{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11960733","patent":{"patent_number":"US-11960733","title":"Memory controller and method of operating the same","assignee":null,"inventors":[],"filing_date":"2022-09-22T00:00:00.000Z","publication_date":"2024-04-16T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":19,"abstract":"Provided herein may be a memory controller and a method of operating the same. The memory controller may include a plurality of control cores configured to control a plurality of memory devices, respectively, a host core configured to allocate write requests received from a host to each of the plurality of control cores based on predefined criteria, and a shared memory configured to be accessed by the host core and the plurality of control cores, wherein, in response to occurrence of a sudden power-off, the host core is further configured to store, in the shared memory, dump information including information about logical addresses corresponding to the write requests, and wherein a first control core is further configured to store, in a memory device controlled by the first control core, the dump information of a second control core associated with the first control core."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory controller and method of operating the same","description":"Provided herein may be a memory controller and a method of operating the same. The memory controller may include a plurality of control cores configured to control a plurality of memory devices, respe","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11960733","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11960733","citation_suggestion":"Patentable. \"Memory controller and method of operating the same\" (US-11960733). https://patentable.app/patents/US-11960733","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11960733","json":"https://patentable.app/api/llm-context/US-11960733","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T04:23:09.670Z"}