{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11961555","patent":{"patent_number":"US-11961555","title":"Resistive memory device with boundary and edge transistors coupled to edge bit lines","assignee":null,"inventors":[],"filing_date":"2022-05-30T00:00:00.000Z","publication_date":"2024-04-16T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":10,"abstract":"A resistive memory device includes a first bit line group including a first edge bit line, a second bit line group including a second edge bit line, and a first boundary transistor configured to apply a non-selection voltage to the second edge bit line according to a selection of the first edge bit line. The first edge bit line of the first bit line group is disposed closest to the second bit line group, and the second edge bit line of the second bit line group is disposed closest to the first bit line group."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Resistive memory device with boundary and edge transistors coupled to edge bit lines","description":"A resistive memory device includes a first bit line group including a first edge bit line, a second bit line group including a second edge bit line, and a first boundary transistor configured to apply","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11961555","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11961555","citation_suggestion":"Patentable. \"Resistive memory device with boundary and edge transistors coupled to edge bit lines\" (US-11961555). https://patentable.app/patents/US-11961555","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11961555","json":"https://patentable.app/api/llm-context/US-11961555","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T01:54:40.035Z"}