{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11961563","patent":{"patent_number":"US-11961563","title":"Balancing peak power with programming speed in non-volatile memory","assignee":null,"inventors":[],"filing_date":"2022-05-26T00:00:00.000Z","publication_date":"2024-04-16T00:00:00.000Z","cpc_codes":["G11C","H01L","G11C","G11C","G11C","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"Technology is disclosed herein for a memory system that balances peak Icc with programming speed. A memory system applies voltages to respective word lines during a verify operation that balances peak Icc with programming speed. The voltages for which the ramp rate is controlled include a read pass voltage applied to unselected word lines and a spike voltage applied to the selected word line at the beginning of the verify. The ramp rate of the voltages is slow enough to keep the peak Icc during verify to a target peak Icc regardless of which word line is selected for verify. However, the ramp rate of the voltages to the word lines during verify is fast enough to make use of the target peak Icc in order achieve faster programming. Therefore, the impact on programming time is minimized while staying within the allowed peak Icc."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Balancing peak power with programming speed in non-volatile memory","description":"Technology is disclosed herein for a memory system that balances peak Icc with programming speed. A memory system applies voltages to respective word lines during a verify operation that balances peak","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11961563","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11961563","citation_suggestion":"Patentable. \"Balancing peak power with programming speed in non-volatile memory\" (US-11961563). https://patentable.app/patents/US-11961563","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11961563","json":"https://patentable.app/api/llm-context/US-11961563","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T09:16:57.743Z"}