{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11961587","patent":{"patent_number":"US-11961587","title":"Clock driver and memory device comprising the same","assignee":null,"inventors":[],"filing_date":"2022-06-22T00:00:00.000Z","publication_date":"2024-04-16T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C"],"num_claims":14,"abstract":"A clock driver comprises: an input multiplexer for receiving a plurality pairs of input clock signals and an input selection signal, and for selectively outputting one pair of the plurality pairs of input clock signals according to the input selection signal; a phase locking loop (PLL) coupled to the input multiplexer to receive one pair of the plurality pairs of input clock signals, and for generating a PLL clock signal according to the received pair of input clock signals; at least two sets of output multiplexers coupled to the PLL to receive the PLL clock signal and an output selection signal, wherein each set of output multiplexers are configured to selectively output the PLL clock signal as a set of output clock signals according to the output selection signal to drive at least one group of memory chips; and a control module configured to detect toggling of the plurality pairs of input clock signals and generate the input selection signal and the output selection signal based on a detection result of the toggling of the plurality pairs of input clock signals."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Clock driver and memory device comprising the same","description":"A clock driver comprises: an input multiplexer for receiving a plurality pairs of input clock signals and an input selection signal, and for selectively outputting one pair of the plurality pairs of i","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11961587","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11961587","citation_suggestion":"Patentable. \"Clock driver and memory device comprising the same\" (US-11961587). https://patentable.app/patents/US-11961587","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11961587","json":"https://patentable.app/api/llm-context/US-11961587","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T16:51:22.351Z"}