{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11962309","patent":{"patent_number":"US-11962309","title":"Phase adjusting circuit, delay locking circuit, and memory","assignee":null,"inventors":[],"filing_date":"2023-02-15T00:00:00.000Z","publication_date":"2024-04-16T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":19,"abstract":"A phase adjusting circuit, a delay locking circuit, and a memory are provided. The phase adjusting circuit includes a detection circuit, a comparison circuit, a counter, and an adjustment circuit that are connected in sequence. The detection circuit is configured to detect a phase difference between a first clock signal and a second clock signal to obtain a first detection signal and a second detection signal. The comparison circuit is configured to perform duty cycle comparison of the first detection signal and the second detection signal to obtain a counting indication signal. The counter is configured to count a number of pulses of a preset counting clock signal based on the counting indication signal to obtain a count value. The adjustment circuit is configured to perform phase adjustment of the second clock signal based on the count value, so that the phase difference is a preset value."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Phase adjusting circuit, delay locking circuit, and memory","description":"A phase adjusting circuit, a delay locking circuit, and a memory are provided. The phase adjusting circuit includes a detection circuit, a comparison circuit, a counter, and an adjustment circuit that","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11962309","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11962309","citation_suggestion":"Patentable. \"Phase adjusting circuit, delay locking circuit, and memory\" (US-11962309). https://patentable.app/patents/US-11962309","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11962309","json":"https://patentable.app/api/llm-context/US-11962309","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T04:19:37.619Z"}