{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11963373","patent":{"patent_number":"US-11963373","title":"3D memory semiconductor devices and structures with memory-line pillars","assignee":null,"inventors":[],"filing_date":"2024-01-08T00:00:00.000Z","publication_date":"2024-04-16T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","H01L","H01L","H01L","G11C","G11C","G11C","G11C","G11C","H01L","H01L","H01L"],"num_claims":20,"abstract":"A 3D memory device, the device including: a first structure including a plurality of memory cells, where each memory cell of the plurality of memory cells includes at least one memory transistor, where each of the at least one memory transistor includes a source, a drain, and a channel; a plurality of memory-line pillars, where each memory-line pillar of the plurality of memory-line pillars is directly connected to a plurality of the source or the drain, where the plurality of memory-line pillars are vertically oriented, and where the at least one memory transistor is self-aligned to an overlaying another the at least one memory transistor, both being processed following a same lithography step; and a control level including a memory controller circuit, where the memory controller circuit includes a row buffer, where the control level is bonded to the first structure, and where the bonded includes hybrid bonding."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"3D memory semiconductor devices and structures with memory-line pillars","description":"A 3D memory device, the device including: a first structure including a plurality of memory cells, where each memory cell of the plurality of memory cells includes at least one memory transistor, wher","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11963373","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11963373","citation_suggestion":"Patentable. \"3D memory semiconductor devices and structures with memory-line pillars\" (US-11963373). https://patentable.app/patents/US-11963373","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11963373","json":"https://patentable.app/api/llm-context/US-11963373","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T06:32:06.218Z"}